A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Design. (arXiv:2309.03208v1 [cs.AR])

Logic Synthesis (LS) plays a vital role in chip design — a cornerstone of
the semiconductor industry. A key task in LS is to transform circuits —
modeled by directed acyclic graphs (DAGs) — into simplified circuits with
equivalent functionalities. To tackle this task, many LS operators apply
transformations to subgraphs — rooted at each node on an input DAG —
sequentially. However, we found that a large number of transformations are
ineffective, which makes applying these operators highly time-consuming. In
particular, we notice that the runtime of the Resub and Mfs2 operators often
dominates the overall runtime of LS optimization processes. To address this
challenge, we propose a novel data-driven LS operator paradigm, namely PruneX,
to reduce ineffective transformations. The major challenge of developing PruneX
is to learn models that well generalize to unseen circuits, i.e., the
out-of-distribution (OOD) generalization problem. Thus, the major technical
contribution of PruneX is the novel circuit domain generalization framework,
which learns domain-invariant representations based on the
transformation-invariant domain-knowledge. To the best of our knowledge, PruneX
is the first approach to tackle the OOD problem in LS operators. We integrate
PruneX with the aforementioned Resub and Mfs2 operators. Experiments
demonstrate that PruneX significantly improves their efficiency while keeping
comparable optimization performance on industrial and very large-scale
circuits, achieving up to $3.1times$ faster runtime.

Source: https://arxiv.org/abs/2309.03208


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